1. Field of the Invention
This application relates to assembled electronics circuit packages and, in particular, to schemes for interconnecting circuit elements or integrated circuit chips to each other on a circuit board. Specifically, the invention has application to circuit assemblies which include conductive runs extending close enough to and parallel to each other for a distance which results in more than negligible cross talk, the conductive runs operating to interconnect various electronic elements of the circuit which operate at very high switching speeds.
2. Description of the Prior Art
The current trend toward ever greater functionality on a single circuit board requires the interconnection of many integrated circuit chips on a single circuit board. With this trend of more circuit elements on a single circuit board, there exists the pressing need for providing complex interconnection schemes for interconnecting such devices to operate according to design. As integrated circuit technology advances towards ever increasing large scale integration and high performance, there is a concurrent increase in the frequencies of the switching signals carried by the various elements and interconnecting runs and it is necessary to provide interconnection and routing methods that are compatible with such increased signal frequencies in order to meet overall performance demands. Thus, the problems of signal delay, package impedance and cross talk become extremely critical. The principles of transmission line technology must, therefore, be engineered into these packages in order to hurdle the extremely high device switching speeds and the frequencies of signals on lines or conductors interconnecting electronic devices in each circuit package.
This application is directed specifically to apparatus and methods for reducing cross talk between adjacent interconnecting runs of such a circuit assembly. In the past, with circuit clock rates and switching rates at more modest levels (below 50 MHz.) the problem of cross talk in interconnecting conductive runs was minimal. Even with higher speeds, the problems remain of little concern in intrachip interconnections since conductive runs on a single integrated circuit chip, typically only about a quarter inch on a side, remain well below the length at which cross talk becomes a concern. Cross talk, as used herein, refers to the coupling of energy from one conductive run to a closely adjacent parallel conductive run as a result of magnetic and electric field effects, i.e., inductive and capacitive coupling existing between adjacent conductive tracings. An analysis of the nature of cross talk is given in an article entitled "Predicting Crosstalk in Digital Systems" by John DeFalco in Computer Design, June 1973, pp. 69-75. A similar background discussion of the cross talk problem with a generalized mathematical analysis is provided in an article entitled "Crosstalk (Noise) in Digital Systems" by I. Cott in IEEE Transactions on Electronic Circuits, Vol. EC-16, No. 6, Dec. 1967. Cross talk results in the generation of spurious signals in a passive conductor which is closely adjacent an active conductor carrying a high frequency signal; the result is to contaminate the integrity of the signals present in the lines, thereby creating errors in transmitted signals and eventually affecting the overall operation of the circuit assembly. The higher the frequency of the pulses in the adjacent lines, the longer the line length, and the closer the lines are spaced, the greater the liklihood of cross talk contamination and its attendant problems. Coupled with high switching rates and close spacing, very rapid rise time signals, such as encountered in integrated circuit chips using emerging fabrication technologies, pose problems of energy coupling between adjacent conductive runs.
The main prior art approach to curing potential cross talk problems has been to keep distances which conductors extend parallel to each other below the length where cross talk is of concern or, if relatively long parallel runs are needed, to move the lines sufficiently apart to reduce the capacitive and inductive coupling between the lines to a tolerable level. In either approach, the problem of cross talk may be avoided.
However, there are circumstances when the conductor lines cannot be made sufficiently short or when space limitations make spreading the conductive runs either difficult or impossible. Such situations present themselves more frequently when logic elements or devices which are spread apart a considerable distance on a circuit board are required to be interconnected by a large number of lines.